Alif Semiconductor /AE302F80F5582AE_CM55_HE_View /ETH /ETH_MAC_WATCHDOG_TIMEOUT

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Interpret as ETH_MAC_WATCHDOG_TIMEOUT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)WTO0 (Val_0x0)PWE

WTO=Val_0x0, PWE=Val_0x0

Description

Watchdog Timeout Register

Fields

WTO

Watchdog Timeout When the PWE bit is set and the ETH_MAC_CONFIGURATION[WD] bit is reset, this field is used as watchdog timeout for a received packet. If the length of a received packet exceeds the value of this field, such packet is terminated and declared as an error packet. Note: When the PWE bit is set, the value in this field should be more than 1,522 (0x5F2). Otherwise, the IEEE 802.3-specified valid tagged packets are declared as error packets and then dropped.

0 (Val_0x0): 2KB

1 (Val_0x1): 3KB

2 (Val_0x2): 4KB

3 (Val_0x3): 5KB

4 (Val_0x4): 6KB

5 (Val_0x5): 7KB

6 (Val_0x6): 8KB

7 (Val_0x7): 9KB

8 (Val_0x8): 10KB

9 (Val_0x9): 11KB

10 (Val_0xA): 12KB

11 (Val_0xB): 13KB

12 (Val_0xC): 14KB

13 (Val_0xD): 15KB

14 (Val_0xE): 16383 bytes

PWE

Programmable Watchdog Enable When this bit is set and the ETH_MAC_CONFIGURATION[WD] bit is reset, the WTO field is used as watchdog timeout for a received packet. When this bit is cleared, the watchdog timeout for a received packet is controlled by setting of the ETH_MAC_CONFIGURATION[WD] and ETH_MAC_CONFIGURATION[JE] bits.

0 (Val_0x0): Programmable watchdog is disabled

1 (Val_0x1): Programmable watchdog is enabled

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